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? 2007 microchip technology inc. ds22001c-page 1 mcp1827/mcp1827s features ? 1.5a output current capability ? input operating voltage range: 2.3v to 6.0v ? adjustable output voltage range: 0.8v to 5.0v (mcp1827 only) ? standard fixed output voltages: - 0.8v, 1.2v, 1.8v, 2.5v, 3.0v, 3.3v, 5.0v ? other fixed output voltage options available upon request ? low dropout voltage: 330 mv typical at 1.5a ? typical output voltage tolerance: 0.5% ? stable with 1.0 f ceramic output capacitor ? fast response to load transients ? low supply current: 120 a (typ) ? low shutdown supply current: 0.1 a (typ) (mcp1827 only) ? fixed delay on power good output (mcp1827 only) ? short circuit current limiting and overtemperature protection ? 5-lead plastic ddpak, 5-lead to-220 package options (mcp1827) ? 3-lead plastic ddpak, 3-lead to-220 package options (mcp1827s) applications ? high-speed driver chipset power ? networking backplane cards ? notebook computers ? network interface cards ? palmtop computers ? 2.5v to 1.xv regulators description the mcp1827/mcp1827s is a 1.5a low dropout (ldo) linear regulator that provides high current and low output voltages. the mcp1827 comes in a fixed or adjustable output voltage version, with an output voltage range of 0.8v to 5.0v. the 1.5a output current capability, combined with the low output voltage capability, make the mcp1827 a good choice for new sub-1.8v output voltage ldo applications that have high current demands. the mcp1827s is a 3-pin fixed voltage version. the mcp1827/mcp1827s is based upon the mcp1727 ldo device. the mcp1827/mcp1827s is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. only 1 f of output capacitance is needed to stabilize the ldo. using cmos construction, the quiescent current consumed by the mcp1827/mcp1827s is typically less than 120 a over the entire input voltage range, making it attractive for portable computing applications that demand high output current. the mcp1827 versions have a shutdown (s hdn ) pin. when shut down, the quiescent current is reduced to less than 0.1 a. on the mcp1827 fixed output versions the scaled-down output voltage is internally monitored and a power good (pwrgd) output is provided when the output is within 92% of regulation (typical). the pwrgd delay is internally fixed at 200 s (typical). the overtemperature and short circuit current-limiting provide additional protection for the ldo during system fault conditions. package types fixed/adjustable 3-ld ddpak 5-ld ddpak 3-ld to-220 5-ld to-220 12345 12345 123 123 pwrgd shdn v in gnd(tab) v out adj shdn v in gnd(tab) v out v in gnd(tab) v out v in gnd(tab) v out mcp1827 mcp1827 mcp1827s mcp1827s 1.5a, low voltage, low quiescent current ldo regulator
mcp1827/mcp1827s ds22001c-page 2 ? 2007 microchip technology inc. typical application mcp1827 adjustable output voltage mcp1827 fixed output voltage v out = 1.8v @ 1a v in = 2.3v to 2.8v on off 1f 100 k 4.7 f c 1 c 2 r 1 shdn v in gnd v out pwrgd 20 k r 2 vadj 12345 v out = 1.2v @ 1a v in = 2.3v to 2.8v on off 1f 40 k 4.7 f c 1 c 2 r 1 shdn v in gnd v out 12345
? 2007 microchip technology inc. ds22001c-page 3 mcp1827/mcp1827s functional block diagram - adjustable output ea + ? v out pmos r f c f i sns overtemperature v ref comp 92% of v ref t delay v in driver w/limit and shdn gnd soft-start adj undervoltage lock out v in reference shdn shdn shdn sensing (uvlo)
mcp1827/mcp1827s ds22001c-page 4 ? 2007 microchip technology inc. functional block diagram - fixed output (5 pin) ea + ? v out pmos r f c f i sns v ref comp 92% of v ref t delay v in gnd soft-start sense v in reference shdn shdn shdn pwrgd overtemperature driver w/limit and shdn undervoltage lock out sensing (uvlo)
? 2007 microchip technology inc. ds22001c-page 5 mcp1827/mcp1827s functional block diagram - fixed output (3-pin) ea + ? v out pmos r f c f i sns v ref comp 92% of v ref t delay v in gnd soft-start sense v in reference shdn shdn shdn overtemperature driver w/limit and shdn undervoltage lock out sensing (uvlo)
mcp1827/mcp1827s ds22001c-page 6 ? 2007 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? v in ....................................................................................6.5v maximum voltage on any pin .. (gnd ? 0.3v) to (v dd + 0.3)v maximum power dissipation......... internally-limited ( note 6 ) output short circuit duration ................................continuous storage temperature .....................................-65c to +150c maximum junction temperature, t j ........................... +150c esd protection on all pins (hbm/mm) ........... 2kv; 200v ? notice: stresses above those listed under ?maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this spec ification is not implied. expo- sure to maximum rating conditions for extended periods may affect device reliability. ac/dc characteristics electrical specifications: unless otherwise noted, v in = v out(max) + v dropout(max) note 1 , v r =1.8v for adjustable output, i out = 1 ma, c in = c out = 4.7 f (x7r ceramic), t a = +25c. boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c parameters sym min typ max units conditions input operating voltage v in 2.3 6.0 v note 1 input quiescent current i q ? 120 220 a i l = 0 ma, v in = note 1 , v out = 0.8v to 5.0v input quiescent current for shdn mode i shdn ?0.1 3 a shdn = gnd maximum output current i out 1.5 ?? av in = 2.3v to 6.0v v r = 0.8v to 5.0v, note 1 line regulation v out / (v out x v in ) ?0.05 0.16 %/v (note 1) v in 6v load regulation v out /v out -1.0 0.5 1.0 %i out = 1 ma to 1.5a, v in = note 1 , ( note 4 ) output short circuit current i out_sc ?2.2? av in = note 1 , r load <0.1 , peak current adjust pin characteristics (adjustable output only) adjust pin reference voltage v adj 0.402 0.410 0.418 vv in = 2.3v to v in =6.0v, i out = 1 ma adjust pin leakage current i adj -10 0.01 +10 na v in = 6.0v, v adj =0vto6v adjust temperature coefficient tcv out ?40?ppm/c note 3 fixed-output characteristics (fixed output only) note 1: the minimum v in must meet two conditions: v in 2.3v and v in v out(max) + v dropout(max). 2: v r is the nominal regulator output voltage for the fixed cases. v r = 1.2v, 1.8v, etc. v r is the desired set point output voltage for the adjustable cases. v r = v adj * ((r 1 /r 2 )+1). figure 4-1. 3: tcv out = (v out-high ? v out-low ) *10 6 / (v r * temperature). v out-high is the highest voltage measured over the temperature range. v out-low is the lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperature using low duty-cy cle pulse testing. load regulation is tested over a load range from 1 ma to the maximum specified output current. 5: dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of v in = v outmax + v dropout(max) . 6: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operat ing junction temperature to exceed the maximum +150c rating. sustained junction temperatures above 150c can impact device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough su ch that the rise in the junction temperature over the ambient temperature is not significant.
? 2007 microchip technology inc. ds22001c-page 7 mcp1827/mcp1827s voltage regulation v out v r - 2.5% v r 0.5% v r + 2.5% v note 2 dropout characteristics dropout voltage v in -v out ? 330 600 mv note 5 , i out = 1.5a, v in(min) =2.3v power good characteristics pwrgd input voltage operat- ing range v pwrgd_vin 1.0 ? 6.0 v t a = +25c 1.2 ? 6.0 t a = -40c to +125c for v in < 2.3v, i sink = 100 a pwrgd threshold voltage (referenced to v out ) v pwrgd_th %v out falling edge 89 92 95 v out < 2.5v fixed, v out = adj. 90 92 94 v out >= 2.5v fixed pwrgd threshold hysteresis v pwrgd_hys 1.0 2.0 3.0 %v out pwrgd output voltage low v pwrgd_l ?0.2 0.4 vi pwrgd sink = 1.2 ma, adj = 0v pwrgd leakage p wrgd _ lk ?1?nav pwrgd = v in = 6.0v pwrgd time delay t pg ? 200 ? s rising edge r pullup = 10 k detect threshold to pwrgd active time delay t vdet-pwrgd ? 200 ? s v adj or v out = v pwrgd_th + 20 mv to v pwrgd_th - 20 mv shutdown input logic high input v shdn-high 45 %v in v in = 2.3v to 6.0v logic low input v shdn-low 15 %v in v in = 2.3v to 6.0v shdn input leakage current shdn ilk -0.1 0.001 +0.1 a v in = 6v, shdn =v in , shdn = gnd ac performance output delay from shdn t or 100 s shdn = gnd to v in v out = gnd to 95% v r output noise e n ?2.0?v/ hz i out = 200 ma, f = 1 khz, c out = 10 f (x7r ceramic), v out = 2.5v ac/dc characteristi cs (continued) electrical specifications: unless otherwise noted, v in = v out(max) + v dropout(max) note 1 , v r =1.8v for adjustable output, i out = 1 ma, c in = c out = 4.7 f (x7r ceramic), t a = +25c. boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c parameters sym min typ max units conditions note 1: the minimum v in must meet two conditions: v in 2.3v and v in v out(max) + v dropout(max). 2: v r is the nominal regulator output voltage for the fixed cases. v r = 1.2v, 1.8v, etc. v r is the desired set point output voltage for the adjustable cases. v r = v adj * ((r 1 /r 2 )+1). figure 4-1. 3: tcv out = (v out-high ? v out-low ) *10 6 / (v r * temperature). v out-high is the highest voltage measured over the temperature range. v out-low is the lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperature using low duty-cy cle pulse testing. load regulation is tested over a load range from 1 ma to the maximum specified output current. 5: dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of v in = v outmax + v dropout(max) . 6: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operat ing junction temperature to exceed the maximum +150c rating. sustained junction temperatures above 150c can impact device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough su ch that the rise in the junction temperature over the ambient temperature is not significant.
mcp1827/mcp1827s ds22001c-page 8 ? 2007 microchip technology inc. temperature specifications power supply ripple rejection ratio psrr ? 60 ? db f = 100 hz, c out = 10 f, i out = 10 ma, v inac = 30 mv pk-pk, c in = 0 f thermal shutdown temperature t sd ? 150 ? c i out = 100 a, v out = 1.8v, v in = 2.8v thermal shutdown hysteresis t sd ?10?ci out = 100 a, v out = 1.8v, v in = 2.8v electrical specifications: unless otherwise indicated, all limits apply for v in = 2.3v to 6.0v. parameters sym min typ max units conditions temperature ranges operating junction temperature range t j -40 ? +125 c steady state maximum junction temperature t j ? ? +150 c transient storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5ld ddpak ja ? 31.2 ? c/w 4-layer jc51 standard board thermal resistance, 3ld ddpak ja ? 31.4 ? c/w 4-layer jc51 standard board thermal resistance, 5ld to-220 ja ? 29.3 ? c/w 4-layer jc51 standard board thermal resistance, 3ld to-220 ja ? 29.4 ? c/w 4-layer jc51 standard board ac/dc characteristi cs (continued) electrical specifications: unless otherwise noted, v in = v out(max) + v dropout(max) note 1 , v r =1.8v for adjustable output, i out = 1 ma, c in = c out = 4.7 f (x7r ceramic), t a = +25c. boldface type applies for junction temperatures, t j ( note 7 ) of -40c to +125c parameters sym min typ max units conditions note 1: the minimum v in must meet two conditions: v in 2.3v and v in v out(max) + v dropout(max). 2: v r is the nominal regulator output voltage for the fixed cases. v r = 1.2v, 1.8v, etc. v r is the desired set point output voltage for the adjustable cases. v r = v adj * ((r 1 /r 2 )+1). figure 4-1. 3: tcv out = (v out-high ? v out-low ) *10 6 / (v r * temperature). v out-high is the highest voltage measured over the temperature range. v out-low is the lowest voltage measured over the temperature range. 4: load regulation is measured at a constant junction temperature using low duty-cy cle pulse testing. load regulation is tested over a load range from 1 ma to the maximum specified output current. 5: dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value that was measured with an input voltage of v in = v outmax + v dropout(max) . 6: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e., t a , t j , ja ). exceeding the maximum allowable power dissipation will cause the device operat ing junction temperature to exceed the maximum +150c rating. sustained junction temperatures above 150c can impact device reliability. 7: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough su ch that the rise in the junction temperature over the ambient temperature is not significant.
? 2007 microchip technology inc. ds22001c-page 9 mcp1827/mcp1827s 2.0 typical performance curves note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . note : junction temperature (t j ) is approximated by soaking the device u nder test to an ambient temperature equal to the desired junction temperature. the test time is small enough such that the ri se in junction temperature over the ambient temperature is not significant. figure 2-1: quiescent current vs. input voltage (1.2v adjustable). figure 2-2: ground current vs. load current (1.2v adjustable). figure 2-3: quiescent current vs. junction temperature (1.2v adjustable). figure 2-4: line regulation vs. temperature (1.2v adjustable). figure 2-5: load regulation vs. temperature (adjstable version). figure 2-6: adjust pin voltage vs. temperature. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 90 100 110 120 130 140 150 23456 input voltage (v) quiescent current ( a) 130 c -45 c 25 c 90 c v out = 1.2v adj i out = 0 ma 100 110 120 130 140 150 160 170 180 190 200 0 250 500 750 1000 1250 1500 load current (ma) ground current (a) v in =3.3v v out = 1.2v adj v in =5.0v v in =2.3v 100 105 110 115 120 125 130 135 140 -45 -20 5 30 55 80 105 130 temperature (c) quiescent current ( a) v in =5.0v v in =2.5v v in =4.0v i out = 0 ma v out = 1.2v adj 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 -45-20 5 305580105130 temperature (c) line regulation (%/v) v out = 1.2v adj v in = 2.3v to 6.0v i out = 1 ma i out = 500 ma i out = 1000 ma i out = 100 ma -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 -45-20 5 305580105130 temperature (c) load regulation (%) i out = 1.0 ma to 1500 ma v out = 5.0v v out = 3.3v v out = 0.8v v out = 1.8v 0.408 0.409 0.409 0.410 0.410 0.411 -45 -20 5 30 55 80 105 130 temperature (c) adjust pin voltage (v) i out = 1.0 ma v in = 6.0v v in = 2.3v v in = 5.0v
mcp1827/mcp1827s ds22001c-page 10 ? 2007 microchip technology inc. note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . figure 2-7: dropout voltage vs. load current (adjustable version). figure 2-8: dropout voltage vs. temperature (adjustable version). figure 2-9: power good (pwrgd) time delay vs. temperature (adjustable version). figure 2-10: quiescent current vs. input voltage (0.8v fixed). figure 2-11: quiescent current vs. input voltage (2.5v fixed). figure 2-12: ground current vs. load current. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 250 500 750 1000 1250 1500 load current (ma) dropout voltage (v) v out = 2.5v adj v out = 5.0v adj 0.30 0.32 0.34 0.36 0.38 0.40 0.42 -45 -20 5 30 55 80 105 130 temperature (c) dropout voltage (v) v out = 3.3v adj v out = 5.0v adj v out = 2.5v adj i out = 1.5a 300 310 320 330 340 350 360 370 -45 -20 5 30 55 80 105 130 temperature (c) power good time delay (s) v out = 3.3v fixed v in = 3.9v v in = 5.0v v in = 4.5v 80 90 100 110 120 130 140 150 23456 input voltage (v) quiescent current ( a) -45c +130c +85c +25c v out = 0.8v i out = 0 ma 80 90 100 110 120 130 140 150 33.544.555.56 input voltage (v) quiescent current ( a) v out = 2.5v i out = 0 ma +130 c -45 c +25 c +90 c 0.00 50.00 100.00 150.00 200.00 250.00 0 250 500 750 1000 1250 1500 load current (ma) ground current ( a) v in = 2.3v for v r =0.8v v in = 3.1v for v r =2.5v v out =0.8v v out =2.5v
? 2007 microchip technology inc. ds22001c-page 11 mcp1827/mcp1827s note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . figure 2-13: quiescent current vs. temperature. figure 2-14: i shdn vs. temperature. figure 2-15: line regulation vs. temperature (0.8v fixed). figure 2-16: line regulation vs. temperature (2.5v fixed). figure 2-17: load regulation vs. temperature (v out < 2.5v fixed). figure 2-18: load regulation vs. temperature (v out 2.5v fixed). 95 100 105 110 115 120 125 130 -45 -20 5 30 55 80 105 130 temperature (c) quiescent current ( a) v out = 0.8v v out = 2.5v i out = 0 ma 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -45 -20 5 30 55 80 105 130 temperature (c) ishdn ( a) v in = 2.3v v in = 4.0v v in = 6.0v v r = 0.8v 0.00 0.02 0.04 0.06 0.08 0.10 -45-20 5 305580105130 temperature (c) line regulation (%/v) v out = 0.8v v in = 2.3v to 6.0v i out = 1 ma i out = 100 ma i out = 500ma i out = 1a 0.015 0.020 0.025 0.030 0.035 0.040 0.045 -45-20 5 305580105130 temperature (c) line regulation (%/v) i out = 1000 ma i out = 1 ma i out = 100 ma i out = 1500 ma i out = 500 ma v r = 2.5v v in = 3.1 to 6.0v -0.30 -0.20 -0.10 0.00 0.10 0.20 0.30 -45 -20 5 30 55 80 105 130 temperature (c) load regulation (%) v out = 0.8v i out = 1 ma to 1500 ma v in = 2.3v -0.45 -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 -45 -20 5 30 55 80 105 130 temperature (c) load regulation (%) v out = 2.5v v out = 5.0v i out = 1 ma to 1500 ma
mcp1827/mcp1827s ds22001c-page 12 ? 2007 microchip technology inc. note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . figure 2-19: dropout voltage vs. load current. figure 2-20: dropout voltage vs. temperature. figure 2-21: short circuit current vs. input voltage. figure 2-22: output noise voltage density vs. frequency. figure 2-23: power supply ripple rejection (psrr) vs. frequency (v out = 1.2v adj.). figure 2-24: power supply ripple rejection (psrr) vs. frequency (v out = 1.2v adj.). 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 250 500 750 1000 1250 1500 load current (ma) dropout voltage (v) v out = 5.0v v out = 2.5v temperature = 25 c 0.25 0.30 0.35 0.40 0.45 -45-20 5 305580105130 temperature (c) dropout voltage (v) i out = 1.5a v out = 2.5v v out = 5.0v 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.0 3.5 4.0 4.5 5.0 5.5 6.0 input voltage (v) short circuit current (a) v out = 2.5v temperature = 25 c 0.010 0.100 1.000 10.000 0.01 0.1 1 10 100 1000 frequency (khz) noise (v/ hz) v r =0.8v, v in =2.3v v r =3.3v, v in =4.1v c out =1 f ceramic x7r c in =10 f ceramic i out =200 ma -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r =1.2v adj c out =10 f ceramic x7r v in =3.1v c in =0 f i out =10 ma -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r =1.2v adj c out =22 f ceramic x7r v in =3.1v c in =0 f i out =10 ma
? 2007 microchip technology inc. ds22001c-page 13 mcp1827/mcp1827s note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . figure 2-25: power supply ripple rejection (psrr) vs. frequency (v out = 3.3v fixed). figure 2-26: power supply ripple rejection (psrr) vs. frequency (v out = 3.3v fixed). figure 2-27: 2.5v (adj.) startup from v in . figure 2-28: 2.5v (adj.) startup from shutdown. figure 2-29: power good (pwrgd) timing. figure 2-30: dynamic line response (3.3v fixed). -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r =3.3v fixed c out =10 f ceramic x7r v in =3.9v c in =0 f i out =10 ma -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v r =3.3v fixed c out =22 f ceramic x7r v in =3.9v c in =0 f i out =10 ma
mcp1827/mcp1827s ds22001c-page 14 ? 2007 microchip technology inc. note: unless otherwise indicated, v out = 1.8v (adjustable), v in = 2.8v, c out = 4.7 f ceramic (x7r), c in = 4.7 f ceramic (x7r), i out = 1 ma, temperature = +25c, v in = v out + 0.6v, r pwrgd = 10 k to v in . figure 2-31: dynamic load response (3.3v fixed, 10 ma to 1500 ma). figure 2-32: dynamic load response (3.3v fixed, 100 ma to 1500 ma).
? 2007 microchip technology inc. ds22001c-page 15 mcp1827/mcp1827s 3.0 pin description the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 input voltage supply (v in ) connect the unregulated or regulated input voltage source to v in . if the input voltage source is located several inches away from the ldo, or the input source is a battery, it is recommended that an input capacitor be used. a typical input capacitance value of 1 f to 10 f should be sufficient for most applications. 3.2 shutdown control input (shdn ) the shdn input is used to turn the ldo output voltage on and off. when the shdn input is at a logic-high level, the ldo output voltage is enabled. when the shdn input is pulled to a logic-low level, the ldo output voltage is disabled. when the shdn input is pulled low, the pwrgd output also goes low and the ldo enters a low quiescent current shutdown state where the typical quiescent current is 0.1 a. 3.3 ground (gnd) connect the gnd pin of the ldo to a quiet circuit ground. this will help the ldo power supply rejection ratio and noise performance. the ground pin of the ldo only conducts the quiescent current of the ldo (typically 120 a), so a heavy trace is not required. for applications have switching or noisy inputs tie the gnd pin to the return of the output capacitor. ground planes help lower inductance and voltage spikes caused by fast transient load currents and are recommended for applications that are subjected to fast load transients. 3.4 power good output (pwrgd) the pwrgd output is an open-drain output used to indicate when the ldo output voltage is within 92% (typically) of its nominal regulation value. the pwrgd threshold has a typical hysteresis value of 2%. the pwrgd output is delayed by 200 s (typical) from the time the ldo output is within 92% + 3% (max hysteresis) of the regulat ed output value on power-up. this delay time is internally fixed. 3.5 output voltage adjust input (adj) for adjustable applications, the output voltage is connected to the adj input through a resistor divider that sets the output volt age regulation value. this provides the user the capability to set the output voltage to any value they desire within the 0.8v to 5.0v range of the device. 3.6 regulated output voltage (v out ) the v out pin is the regulated output voltage of the ldo. a minimum output capacitance of 1.0 f is required for ldo stability. the mcp1827/mcp1827s is stable with ceramic, tantalum and aluminum-electro- lytic capacitors. see section 4.3 ?output capacitor? for output capacitor selection guidance. 3.7 exposed pad (ep) the ddpak and to-220 package have an exposed tab on the package. a heat sink may be mount to the tab to aid in the removal of heat from the package during operation. the exposed tab is at the ground potential of the ldo. 3-pin fixed output 5-pin fixed output adjustable output name description ? 1 1 shdn shutdown control input (active-low) 122v in input voltage supply 233gndground 344v out regulated output voltage ? 5 ? pwrgd power good output ?? 5 adj voltage adjust/sense input pad pad pad ep exposed pad of t he package (ground potential)
mcp1827/mcp1827s ds22001c-page 16 ? 2007 microchip technology inc. 4.0 device overview the mcp1827/mcp1827s is a high output current, low dropout (ldo) voltage regulator. the low dropout voltage of 330 mv typical at 1.5a of current makes it ideal for battery-powered applications. unlike other high output current ldos, the mcp1827/mcp1827s only draws a maximum of 22 0 a of quiescent current. the mcp1827 has a shutdown control input and a power good output. 4.1 ldo output voltage the 5-pin mcp1827 ldo is available with either a fixed output voltage or an adjustable output voltage. the output voltage range is 0.8v to 5.0v for both versions. the 3-pin mcp1827s ldo is available as a fixed voltage device. 4.1.1 adjust input the adjustable version of the mcp1827 uses the adj pin (pin 5) to get the output voltage feedback for output voltage regulation. this allows the user to set the output voltage of the device with two external resistors. the nominal voltage for adj is 0.41v. figure 4-1 shows the adjustable version of the mcp1827. resistors r 1 and r 2 form the resistor divider network necessary to set the output voltage. with this configuration, the equation for setting v out is: equation 4-1: figure 4-1: typical adjustable output voltage application circuit. the allowable resistance value range for resistor r 2 is from 10 k to 200 k . solving the equation for r 1 yields the following equation: equation 4-2: 4.2 output current and current limiting the mcp1827/mcp1827s ldo is tested and ensured to supply a minimum of 1.5a of output current. the mcp1827/mcp1827s has no minimum output load, so the output load current can go to 0 ma and the ldo will continue to regulate the output voltage to within tolerance. the mcp1827/mcp1827s also incorporates an output current limit. if the output voltage falls below 0.7v due to an overload condition (usually represents a shorted load condition), the output current is limited to 2.2a (typical). if the overload condition is a soft overload, the mcp1827/mcp1827s will supply higher load currents of up to 3a. the mcp1827/mcp1827s should not be operated in this condition c ontinuously as it may result in failure of the device. however, this does allow for device usage in applications that have higher pulsed load currents having an average output current value of 1.5a or less. output overload conditions may also result in an over-temperature shutdown of the device. if the junction temperature rises above 150c, the ldo will shut down the output voltage. see section 4.8 ?overtemperature protection? for more information on overtemperature shutdown. 4.3 output capacitor the mcp1827/mcp1827s requires a minimum output capacitance of 1 f for output voltage stability. ceramic capacitors are recommended because of their size, cost and environmental robustness qualities. aluminum-electrolytic and tantalum capacitors can be used on the ldo output as well. the equivalent series resistance (esr) of the el ectrolytic output capacitor must be no greater than 1 ohm. the output capacitor should be located as clos e to the ldo output as is practical. ceramic materials x7r and x5r have low temperature coefficients and are well within the acceptable esr range required. a typical 1 f x7r 0805 capacitor has an esr of 50 milli-ohms. larger ldo output capacitors can be used with the mcp1827/mcp1827s to improve dynamic performance and power supply ripple rejection performance. a maximum of 22 f is recommended. aluminum-electrolytic ca pacitors are not recom- mended for low-temperat ure applications of 25c. v out v adj r 1 r 2 + r 2 ------------------ ?? ?? = where: v out = ldo output voltage v adj =adj pin voltage (typically 0.41v) shdn gnd adj 2 1f v out 4.7 f v in on off r 1 r 2 c 1 c2 mcp1827-adj 1 3 4 5 r 1 r 2 v out v adj ? v adj -------------------------------- ?? ?? = where: v out = ldo output voltage v adj =adj pin voltage (typically 0.41v)
? 2007 microchip technology inc. ds22001c-page 17 mcp1827/mcp1827s 4.4 input capacitor low input source impedance is necessary for the ldo output to operate proper ly. when operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the ldo, some input capacitance is recommended. a minimum of 1.0 f to 4.7 f is recommended for most applications. for applications that have output step load requirements, the input capa citance of the ldo is very important. the input capacitance provides the ldo with a good local low-impedance source to pull the transient currents from in order to respond quickly to the output load step. for good step response performance, the input capacitor should be of equivalent (or higher) value than the output capacitor. the capacitor should be placed as close to the input of the ldo as is practical. larger input capacitors will also help reduce any high-frequency noise on the input and output of the ldo and redu ce the effects of any inductance that exists between the input source voltage and the input capacitance of the ldo. 4.5 power good output (pwrgd) the pwrgd output is used to indicate when the output voltage of the ldo is within 92% (typical value, see section 1.0 ?electri cal characteristics? for minimum and maximum specifications) of its nominal regulation value. as the output voltage of the ldo rises, the pwrgd output will be held low until the output voltage has exceeded the power good threshold plus the hysteresis value. once this threshold has been exceeded, the power good time delay is started (shown as t pg in the electrical characteristics table). the power good time delay is fixed at 200 s (typical). after the time delay period, the pwrgd output will go high, indicating that the output voltage is stable and within regulation limits. if the output voltage of the ldo falls below the power good threshold, the power good output will transition low. the power good circuitry has a 170 s delay when detecting a falling output voltage, which helps to increase noise immunity of the power good output and avoid false triggering of the power good output during fast output transients. see figure 4-2 for power good timing characteristics. when the ldo is put into shutdown mode using the shdn input, the power good output is pulled low immediately, indicating that the output voltage will be out of regulation. the timing diagram for the power good output when using the shutdown input is shown in figure 4-3. the power good output is an open-drain output that can be pulled up to any voltage that is equal to or less than the ldo input voltage. this output is capable of sinking 1.2 ma (v pwrgd < 0.4v maximum). figure 4-2: power good timing. figure 4-3: power good timing from shutdown. 4.6 shutdown input (shdn ) the shdn input is an active-low input signal that turns the ldo on and off. the shdn threshold is a percentage of the input voltage. the typical value of this shutdown threshold is 30% of v in , with minimum and maximum limits over the entire operating temperature range of 45% and 15%, respectively. the shdn input will ignore low-going pulses (pulses meant to shut down the ldo) that are up to 400 ns in pulse width. if the shutdown input is pulled low for more than 400 ns, the ldo will enter shutdown mode. this small bit of filtering helps to reject any system noise spikes on the shutdown input signal. on the rising edge of the shdn input, the shutdown circuitry has a 30 s delay before allowing the ldo output to turn on. this delay helps to reject any false turn-on signals or noise on the shdn input signal. after t pg t vdet_pwrgd v pwrgd_th v out pwrgd v ol v oh v in shdn v out 30 s 70 s t or pwrgd t pg
mcp1827/mcp1827s ds22001c-page 18 ? 2007 microchip technology inc. the 30 s delay, the ldo output enters its soft-start period as it rises from 0v to its final regulation value. if the shdn input signal is pulled low during the 30 s delay period, the timer will be reset and the delay time will start over again on the next rising edge of the shdn input. the total time from the shdn input going high (turn-on) to the ldo output being in regulation is typically 100 s. see figure 4-4 for a timing diagram of the shdn input. figure 4-4: shutdown input timing diagram. 4.7 dropout voltage and undervoltage lockout dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below the nominal value that was measured with a v r + 0.6v differential applied. the mcp1827/mcp1827s ldo has a very low dropout voltage specification of 330 mv (typical) at 1.5a of out- put current. see section 1.0 ?electrical characteris- tics? for maximum dropout voltage specifications. the mcp1827/mcp1827s ldo operates across an input voltage range of 2.3v to 6.0v and incorporates input undervoltage lockout (uvlo) circuitry that keeps the ldo output voltage off until the input voltage reaches a minimum of 2.18v (typical) on the rising edge of the input voltage. as the input voltage falls, the ldo output will remain on until the input voltage level reaches 2.04v (typical). since the mcp1827/mcp1827s ldo undervoltage lockout activates at 2.04v as the input voltage is falling, the dropout voltage specification does not apply for output voltages that are less than 1.9v. for high-current applications, voltage drops across the pcb traces must be taken into account. the trace resistances can cause significant voltage drops between the input voltage source and the ldo. for applications with input voltages near 2.3v, these pcb trace voltage drops can sometimes lower the input voltage enough to trigger a shutdown due to undervoltage lockout. 4.8 overtemperature protection the mcp1827/mcp1827s ldo has tempera- ture-sensing circuitry to pr event the junction tempera- ture from exceeding approximately 150 c. if the ldo junction temperature does reach 150 c, the ldo output will be turned off until the junction temperature cools to approximately 140 c, at which point the ldo output will automatically resume normal operation. if the internal power dissipation continues to be excessive, the device will again shut off. the junction temperature of the die is a function of power dissipation, ambient tem perature and package thermal resistance. see section 5.0 ?application cir- cuits/issues? for more information on ldo power dissipation and junction temperature. shdn v out 30 s 70 s t or 400 ns (typ)
? 2007 microchip technology inc. ds22001c-page 19 mcp1827/mcp1827s 5.0 application circuits/issues 5.1 typical application the mcp1827/mcp1827s is us ed for applications that require high ldo output current and a power good output. figure 5-1: typical application circuit. 5.1.1 application conditions 5.2 power calculations 5.2.1 power dissipation the internal power dissipation within the mcp1827/mcp1827s is a function of input voltage, output voltage, output curre nt and quiescent current. equation 5-1 can be used to calculate the internal power dissipation for the ldo. equation 5-1: in addition to the ldo pass element power dissipation, there is power dissipation within the mcp1827/mcp1827s as a result of quiescent or ground current. the power dissipation as a result of the ground current can be calculated using the following equation: equation 5-2: the total power dissipated within the mcp1827/mcp1827s is the sum of the power dissi- pated in the ldo pass device and the p(i gnd ) term. because of the cmos construction, the typical i gnd for the mcp1827/mcp1827s is 120 a. operating at a maximum of 3.465v results in a power dissipation of 0.49 milli-watts. for most applications, this is small compared to the ldo pass device power dissipation and can be neglected. the maximum continuous operating junction temperature specified for the mcp1827/mcp1827s is +125 c . to estimate the internal junction temperature of the mcp1827/mcp1827s, the total internal power dissipation is multiplied by the thermal resistance from junction to ambient (r ja ) of the device. the thermal resistance from junction to ambient for the to-220-5 package is estimated at 29.3 c/w. equation 5-3: package type = to-220-5 input voltage range = 3.3v 5% v in maximum = 3.465v v in minimum = 3.135v v dropout (max) = 0.550v v out (typical) = 2.5v i out = 1.5a maximum p diss (typical) = 1.2w temperature rise = 35.2 c 10 f v out = 2.5v @ 1.5a r 1 c 2 10 k pwrgd shdn gnd 2 4.7 f on off c 1 mcp1827-2.5 1 3 4 5 3.3v v in p ldo v in max ) () v out min () ? () i out max ) () = where: p ldo = ldo pass device internal power dissipation v in(max) = maximum input voltage v out(min) = ldo minimum output voltage p ignd () v in max () i vin = where: p i(gnd = power dissipation due to the quiescent current of the ldo v in(max) = maximum input voltage i vin = current flowing in the v in pin with no ldo output current (ldo quiescent current) t jmax () p total r ja t amax + = t j(max) = maximum continuous junction temperature p total = total device power dissipation r ja = thermal resistance from junction to ambient t amax = maximum ambient temperature
mcp1827/mcp1827s ds22001c-page 20 ? 2007 microchip technology inc. the maximum power dissipa tion capability for a package can be calculated given the junction-to-ambient thermal resistance and the maxi- mum ambient temperature for the application. equation 5-4 can be used to determine the package maximum internal power dissipation. equation 5-4: equation 5-5: equation 5-6: 5.3 typical application internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation is calculated in the following example. the power dissipation as a result of ground current is small enough to be neglected. 5.3.1 power dissipation example 5.3.1.1 device juncti on temperature rise the internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction-to-ambient for the application. the thermal resistance from junction-to-ambient (r ja ) is derived from eia/jedec standards for measuring thermal resistance. the eia/jedec specification is jesd51. the standard describes the test method and board specifications fo r measuring the thermal resistance from junction to ambient. the actual thermal resistance for a particular application can vary depending on many factors such as copper area and thickness. refer to an792, ?a method to determine how much power a sot23 can dissipate in an application? (ds00792), for more information regarding this subject. p dmax () t jmax () t amax () ? () r ja --------------------------------------------------- = p d(max) = maximum device power dissipation t j(max) = maximum continuous junction temperature t a(max) = maximum ambient temperature r ja = thermal resistance from junction to ambient t jrise () p dmax () r ja = t j(rise) = rise in device junction temperature over the ambient temperature p d(max) = maximum device power dissipation r ja = thermal resistance from junction to ambient t j t jrise () t a + = t j = junction temperature t j(rise) = rise in device junction temperature over the ambient temperature t a = ambient temperature package package type = to-220-5 input voltage v in = 3.3v 5% ldo output voltage and current v out = 2.5v i out = 1.5a maximum ambient temperature t a(max) =60c internal power dissipation p ldo(max) =(v in(max) ? v out(min) ) x i out(max) p ldo = ((3.3v x 1.05) ? (2.5v x 0.975)) x 1.5a p ldo =1.54 watts t j(rise) =p total x r ja t jrise = 1.54 w x 29.3 c/w t jrise = 45.12 c
? 2007 microchip technology inc. ds22001c-page 21 mcp1827/mcp1827s 5.3.1.2 junction temperature estimate to estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. for th is example, the worst-case junction temperature is estimated below: as you can see from the result, this application will be operating within the maximum operating junction temperature of 125c. 5.3.1.3 maximum package power dissipation at 60c ambient temperature from this table you can see the difference in maximum allowable power dissipation between the to-220-5 package and the ddpak-5 package. t j =t jrise + t a(max) t j = 45.12c + 60.0c t j = 105.12c to-220-5 (29.3 c/w r ja ): p d(max) = (125c ? 60c) / 29.3 c/w p d(max) = 2.218w ddpak-5 (31.2c/watt r ja ): p d(max) = (125c ? 60c)/ 31.2 c/w p d(max) = 2.083w
mcp1827/mcp1827s ds22001c-page 22 ? 2007 microchip technology inc. 6.0 packaging information 6.1 package marking information example: legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 3-lead ddpak (mcp1827s) 5-lead ddpak (fixed) (mcp1827) 3-lead to-220 (mcp1827s) 5-lead to-220 (adj) (mcp1827) 12345 12345 1 23 123 xxxxxxxxx xxxxxxxxx yywwnnn xxxxxxxxx xxxxxxxxx yywwnnn xxxxxxxxx xxxxxxxxx yywwnnn xxxxxxxxx xxxxxxxxx yywwnnn 123 mcp1827s 0.8eeb^^ 0630256 123 mcp1827s 12eab^^ 0630256 12345 mcp1827 1.0eet^^ 0630256 12345 mcp1827 08eat^^ 0630256 example: example: example: 3 e 3 e 3 e 3 e
? 2007 microchip technology inc. ds22001c-page 23 mcp1827/mcp1827s 3-lead plastic (eb) [ddpak] notes: 1. significant characteristic. 2. dimensions d and e do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005" per side. 3. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 3 pitch e .100 bsc overall height a .160 ? .190 standoff a1 .000 ? .010 overall width e .380 ? .420 exposed pad width e1 .245 ? ? molded package length d .330 ? .380 overall length h .549 ? .625 exposed pad length d1 .270 ? ? lead thickness c .014 ? .029 pad thickness c2 .045 ? .065 lower lead width b .020 ? .039 upper lead width b1 .045 ? .070 foot length l .068 ? .110 pad length l1 ? ? .067 foot angle 0 ? 8 e e1 h l1 d d1 n 1 e b b1 c c2 l a a1 bottom view top view chamfer optional microchip technology drawing c04-011b
mcp1827/mcp1827s ds22001c-page 24 ? 2007 microchip technology inc. 3-lead plastic transistor outline (ab) [to-220] notes: 1. dimensions d and e do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005" per side. 2. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 3 pitch e .100 bsc overall pin pitch e1 .200 bsc overall height a .140 ? .190 tab thickness a1 .020 ? .055 base to lead a2 .080 ? .115 overall width e .357 ? .420 mounting hole center q .100 ? .120 overall length d .560 ? .650 molded package length d1 .330 ? .355 tab length h1 .230 ? .270 mounting hole diameter p .139 ? .156 lead length l .500 ? .580 lead shoulder l1 ? ? .250 lead thickness c .012 ? .024 lead width b .015 .027 .040 shoulder width b2 .045 .057 .070 e q d d1 l1 l 1 2 e e 1 b b2 n a2 c h1 a1 a p chamfer optional microchip technology drawing c04-034b
? 2007 microchip technology inc. ds22001c-page 25 mcp1827/mcp1827s 5-lead plastic (et) [ddpak] notes: 1. significant characteristic. 2. dimensions d and e do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005" per side. 3. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 5 pitch e .067 bsc overall height a .160 ? .190 standoff a1 .000 ? .010 overall width e .380 ? .420 exposed pad width e1 .245 ? ? molded package length d .330 ? .380 overall length h .549 ? .625 exposed pad length d1 .270 ? ? lead thickness c .014 ? .029 pad thickness c2 .045 ? .065 lead width b .020 ? .039 foot length l .068 ? .110 pad length l1 ? ? .067 foot angle 0 ? 8 e l1 d d1 h n 1 b e top view bottom view a a1 c l c2 chamfer optional e1 microchip technology drawing c04-012b
mcp1827/mcp1827s ds22001c-page 26 ? 2007 microchip technology inc. 5-lead plastic transistor outline (at) [to-220] notes: 1. dimensions d and e do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005" per side. 2. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 5 pitch e .067 bsc overall pin pitch e1 .268 bsc overall height a .140 ? .190 overall width e .380 ? .420 overall length d .560 ? .650 molded package length d1 .330 ? .355 tab length h1 .204 ? .293 tab thickness a1 .020 ? .055 mounting hole center q .100 ? .120 mounting hole diameter p .139 ? .156 lead length l .482 ? .590 base to bottom of lead a2 .080 ? .115 lead thickness c .012 ? .025 lead width b .015 .027 .040 e q d d1 h1 a a1 a2 c n e e 1 b 1 2 3 l chamfer optional p microchip technology drawing c04-036b
? 2007 microchip technology inc. ds22001c-page 27 mcp1827/mcp1827s appendix a: revision history revision c (february 2007) ? figure 2-22: revised label on y-axis. ? section 2.0 ?typical performance curves? : added note on juncti on temperature. ? pages 9-14: revised notes. revision b (september 2006) ? correction to maximum dropout voltage in section 1.0. ? added additional graphs in section 2.0. ? added disclaimer to package outline drawings. revision a (july 2006) ? original release of this document.
mcp1827/mcp1827s ds22001c-page 28 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds22001c-page 29 mcp1827/mcp1827s product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: mcp1827: 1.5a low dropout regulator mcp1827t: 1.5a low dropout regulator tape and reel mcp1827s: 1.5a low dropout regulator mcp1827st: 1.5a low dropout regulator tape and reel output voltage *: 08 = 0.8v ?standard? 12 = 1.2v ?standard? 18 = 1.8v ?standard? 25 = 2.5v ?standard? 30 = 3.0v ?standard? 33 = 3.3v ?standard? 50 = 5.0v ?standard? *contact factory for other output voltage options extra feature code: 0 = fixed tolerance: 2 = 2.0% (standard) temperature: e = -40 c to +125 c package type: ab = plastic transistor outline, to-220, 3-lead at = plastic transistor outline, to-220, 5-lead eb = plastic, ddpak, 3-lead et = plastic, ddpak, 5-lead part no. x xx output feature code device voltage x tolerance x/ temp. xx package examples: a) mcp1827-0802e/at: 0.8v ldo regulator 5ld to-220 b) mcp1827-1002e/et: 1.0v ldo regulator 5ld ddpak c) mcp1827-1202e/at: 1.2v ldo regulator 5ld to-220 d) mcp1827-1802e/at: 1.8v ldo regulator 5ld to-220 e) mcp1827-2502e/et: 2.5v ldo regulator 5ld ddpak f) mcp1827-3002e/et: 3.0v ldo regulator 5ld ddpak g) mcp1827-3302e/at 3.3v ldo regulator 5ld to-220 h) mcp1827-5002e/et: 5.0v ldo regulator 5ld ddpak i) mcp1827-adje/at: adj ldo regulator 5ld to-220 a) mcp1827s-0802e/eb:0.8v ldo regulator 3ld ddpak b) mcp1827s-0802e/ab:0.8v ldo regulator 3ld to-220 c) mcp1827s-1002e/eb:1.0v ldo regulator 3ld ddpak d) mcp1827s-1202e/ab 1.2v ldo regulator 3ld to-220 e) mcp1827s-1802e/eb 1.8v ldo regulator 3ld ddpak f) mcp1827s-2502e/eb 2.5v ldo regulator 3ld ddpak g) mcp1827s-2502e/eb 3.0v ldo regulator 3ld ddpak h) mcp1827s-3302e/ab 3.3v ldo regulator 3ld to-220 i) mcp1827s-5002e/eb 5.0v ldo regulator 3ld ddpak j) mcp1827s-adje/ab adj ldo regulator 3ld to-220
mcp1827/mcp1827s ds22001c-page 30 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds22001c-page 31 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , k ee l oq logo, micro id , mplab, pic, picmicro, picstart, pro mate, powersmart, rfpic, and smartshunt are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, linear active thermistor, migratable memory, mxdev, mxlab, ps logo, seeval, smartsensor and the embedded control solutions company are registered trademarks of microc hip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powertool, real ice, rflab, rfpicdem, select mode, smart serial, smarttel, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2007, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwar e or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona, gresham, oregon and mountain view, california. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development syst ems is iso 9001:2000 certified.
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